1. Field of the Invention
The present invention relates to a computer system for conditionally carrying out an operation defined in a computer instruction, and particularly to methods and means for controlling conditional execution of instructions which cause results to be held in multiple destination stores.
2. Background
Single Instruction Multiple Data (SIMD) computer systems are known which act on so-called packed operands. That is, each operand comprises a plurality of packed objects held in respective lanes of the operand. The degree of packing can vary and for sixty-four bit operands it is known to provide eight bit objects (8 objects per 64 bit operand), 16 bit objects (4 objects per 64 bit operand) and 32 bit objects (2 objects per 64 bit operand). A known computer system can conditionally execute instructions on a per operand lane basis according to respective condition codes held in a condition code register. This known computer system is described in detail in WO 01/06353 A10. A problem with this type of computer system is that it does not provide for per SIMD lane conditional execution of instructions which cause results to be sent to a plurality of different result stores. A further problem with this type of known system is the need to manage the contents of a test register by means of additional operations to control which lanes are executed.
The present invention seeks to provide an improved method and apparatus for conditionally executing instructions.